Samuel Tensingh is an Associate Lecturer at the School of Biomedical Engineering in the University of Sydney. He has 13 years of experience designing Digital Integrated Circuits for Avago Technologies, Broadcom Limited and ST Microelectronics in Singapore, where he worked as a Senior Physical Design Engineer. He has multiple certifications from Cadence Design Systems. His experience is mainly in RTL-GDS Implementation, delivering numerous ASIC designs in his career.

Samuel holds an MBA from Anglia Ruskin University, UK, and a Bachelor of Engineering in Electronics and Communication from Anna University, India. He is a Senior Member of IEEE and an active member of 35 Technical Societies across the globe. He has reviewed papers and chaired sessions in more than 10 IEEE conferences and holds seven patents for IoT projects. 

Samuel published a paper titled “Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study” in Electronics, an MDPI Journal, 2022, and an article “Importance of Security in IC Design” in the Singapore Semiconductor Voice magazine by the Singapore Semiconductor Industry Association, 2019. He also received a Technical Merit Award for the paper “A Novel Approach in Security Implementation and Clock Tree Synthesis using ICC2” in SNUG, Penang, 2018. He is passionate about sharing his expertise with students and professionals and has delivered Guest lectures in more than 100 international platforms on VLSI design, IoT, and cybersecurity.